B.Tech, M.Tech Graduates Vacancy at Synopsys

Overview:

Synopsys is looking for an experienced R & D Engineer at their Bangalore location. A person in the position would be responsible for designing, developing, trouble shooting, debugging and maintaining large and efficient software systems for technology mapping, logic and timing optimization steps of the FPGA logic synthesis software.

Roles and responsibilities:

The ideal candidate should be able to:

• Given a requirement or functional specification, design and implement efficient data structures and algorithms in C/C++.
• Work with CAE team in test planning, execution and customer support.
• Maintain and support existing product and features.

Eligibility:

• Tech/M. Tech in CS/EE from a reputed institute.
• 2+ years of experience in designing, developing and maintaining large EDA software.
• Sound understanding in subjects such as  data structures, graph algorithms and C/C++ programming on Windows/Unix.
• Familiarity in digital logic design.
• Familiarity with Verilog/VHDL RTL level designs, timing constrains, static timing analysis.
• Working knowledge of FPGA design tools and flows is a plus.

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