Job Update: Engineering Graduate Vacancy at Intel

Overview:

Intel is hiring eligible and interested applicants for the post of Altera- IP Design Verification Lead at their location Bangalore, India location.

To complete details for this job are as follows.

Roles and Responsibilities:

• Performs functional verification of IP logic to ensure design will meet specification requirements.
• Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications.
• Executes verification plans and defines and runs system simulation models to verify the design.
• Replicates, root causes, and debugs issues in the presilicon environment.
• Finds and implements corrective measures to resolve failing tests.
• Collaborates with architects, RTL developers, and hardware verification teams to improve verification of complex architectural and microarchitectural features.
• Maintains and improves existing functional verification infrastructure and methodology.
• Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.
• Builds/Leads a team of verification engineers to independently drive and deliver verification of one or more IPs.
• Note: In Q4 2023, Intel announced PSG will be reported as a separate business unit beginning on January 1, 2024 with ongoing support from Intel. This position is associated to that standalone business strategy and is expected to fully transition to a standalone company at some time in the future.

Qualifications:

Minimum Qualifications:

• Bachelor’s in engineering with at least 15 years of experience in front-end verification.
• DV lead for MCDMA IP
• Must have Design Verification candidates with UVM expertise
• Concentration on VLSI or IC design
• Prior Exp in IP Verification
• Lead exp required
• MCDMA/ DMA IP knowledge will be an added advantage
• Verification in the FPGA domain will be an added advantage

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